Variable block lengths on-the-fly error correcting decoder

Details Variable block lengths on-the-fly error correcting decoder Variable block lengths on-the-fly error correcting decoder

1992-04-30

1994-07-12

Baker, Stephen M.

Excavating

H03M 1322

Patent

active

053295358

ABSTRACT:
An ECC decoder is provided for use with variable block lengths of Reed-Solomon (RS) code for on-the-fly detecting of multiple errors and correction of one error byte per interleave in data recorded on a storage medium in blocks. Each data block includes variable length data subblocks equal to N*L, where N equals a variable number of bytes per interleave and L equals the interleave degree. The ECC decoder includes a delay register for sequentially receiving consecutive N*L data bytes of the data subblocks at a delay register data input and for sequentially transferring the consecutive N*L data bytes of data subblocks to a delay register data output. Each subblock contains a predetermined number of error check bytes M. Multiple M partial syndrome generators sequentially receive the consecutive subblocks of data and generate partial syndromes. The generated partial syndromes are compared to identify agreement. A first one of the multiple M partial syndrome generators is coupled to the delay register data output for selectively adding an error pattern to the transferred data subblock responsive to identified agreement of the partial syndromes.

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