Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2007-08-20
2008-12-16
Hur, J. H. (Department: 2824)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185030, C365S185210, C365S210120, C365S210140, C365S210150, C365S207000, C365S210100
Reexamination Certificate
active
07466592
ABSTRACT:
A multi-level semiconductor memory device for storing multi-level data having three or more values is implemented by utilizing a nonvolatile memory device for storing 2-valued data. Identification of successive 16-bit data externally applied is performed with external address bit AA [2], and a storage block is selected with external address bit AA [23]. Upper word data LW and lower word data UW are compressed into byte data of 8 bits, respectively, and stored in a memory cell array.
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Mitani Hidenori
Ogura Taku
Yamauchi Tadaaki
Hur J. H.
McDermott Will & Emery LLP
Renesas Technology Corp.
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