Semiconductor package substrate with embedded chip and...

Details Semiconductor package substrate with embedded chip and... Semiconductor package substrate with embedded chip and...

2005-05-18

2008-11-11

Thai, Luan (Department: 2891)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

C438S118000, C438S119000, C438S121000, C257S711000, C257S687000, C257S685000

Reexamination Certificate

active

07449363

ABSTRACT:
A semiconductor package substrate with embedded chip and a fabrication method thereof are provided. A first insulating layer is applied on a metallic board, and formed with at least one opening for exposing a portion of the metallic board. At least one semiconductor chip is mounted on the exposed portion of the metallic board. A support plate is mounted on the first insulating layer, and formed with a through cavity at a position corresponding to the opening of the first insulating layer, for receiving the chip in the through cavity. A second insulating layer is applied on the chip and the support plate. Insulating materials of the insulating layers fill a gap between the chip and the support plate. A circuit layer is formed on the second insulating layer, wherein the circuit layer is electrically connected to the chip by conductive structures formed in the second insulating layer.

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