Semiconductor memory device and electronic apparatus

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185200, C365S185180

Reexamination Certificate

active

07457164

ABSTRACT:
In the semiconductor storage device, in a read operation, a bit line charging/discharging section101performs discharge of bit lines of a memory cell array100, and a counter counts discharge periods over which the potentials of bit lines come to a specified potential, based on a comparison result of a comparator comparing a potential of a bit line with a reference potential. Based on the comparison result, a reference value generation section104generates a reference value (RCi) for determining information stored in each of the memory cells. The above count value (CBUSi) and the above reference value (RCi) are compared with each other by a data decision circuit108. Based on the comparison result, an output data control circuit109outputs information stored in each of the memory cells. This semiconductor storage device suppresses increases in chip area and power consumption and outputs memory cell information accurately.

REFERENCES:
patent: 6459612 (2002-10-01), Satoh et al.
patent: 6912160 (2005-06-01), Yamada
patent: 6944077 (2005-09-01), Morikawa
patent: 2004-273093 (2004-09-01), None

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