Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices
Reexamination Certificate
2008-04-02
2008-12-30
Pham, Thanhha (Department: 2894)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Making plural separate devices
C438S114000, C438S462000, C257SE21499
Reexamination Certificate
active
07470567
ABSTRACT:
A semiconductor device manufacturing method capable of improving the semiconductor device manufacturing yield is disclosed. Semiconductor chips are mounted respectively over semiconductor device regions of a matrix wiring substrate having plural semiconductor device regions, followed by wire bonding, and thereafter sealing resin is formed at a time onto the semiconductor device regions. Thereafter, target marks for dicing are formed on an upper surface of the sealing resin on the basis of target marks pre-formed on an upper surface of the wiring substrate. Then, half-dicing is performed from the upper surface side of the sealing resin5aon the basis of the target marks for dicing to form grooves whose bottoms reach the wiring substrate. Subsequently, solder balls are connected to a lower surface of the wiring substrate and dicing is performed from a lower surface side of the wiring substrate for division into individual semiconductor devices.
REFERENCES:
patent: 6649448 (2003-11-01), Tomihara
patent: 7033857 (2006-04-01), Munakata et al.
patent: 2007/0216038 (2007-09-01), Park et al.
patent: 2004-55860 (2004-02-01), None
Mattingly, Stanger Malur & Brundidge PC
Pham Thanhha
Renesas Technology Corp.
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