Non-volatile semiconductor memory device

Details Non-volatile semiconductor memory device Non-volatile semiconductor memory device

2006-05-19

2008-08-26

Hoang, Huan (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185220

Reexamination Certificate

active

07417898

ABSTRACT:
Charge is trapped into a charge trapping region of one of two reference cells so as to achieve a state equivalent to memory cell characteristics having a smallest amount of current. Charge is trapped into a charge trapping region of the other reference cell so as to achieve a state equivalent to memory cell characteristics having a largest amount of current. Currents output from these reference cells are averaged by a current averaging circuit, and the resultant average current is output as a reference current R_REF1.

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