Semiconductor device and method of manufacturing the same

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

Reexamination Certificate

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Details

C257S296000, C257S774000, C257SE23145, C257SE23151, C257SE23175, C257S303000, C257SE23142, C257SE23143

Reexamination Certificate

active

07432597

ABSTRACT:
In a semiconductor device including a memory region and a logic region, one or more of a plurality of logic transistor connection plugs, buried in a first insulating layer and connected to a diffusion layer of a logic transistor, are left unconnected to a first interconnect provided in an upper layer.

REFERENCES:
patent: 6130449 (2000-10-01), Matsuoka et al.
patent: 6258649 (2001-07-01), Nakamura et al.
patent: 6461911 (2002-10-01), Ahn et al.
patent: 2002/0024140 (2002-02-01), Nakajima et al.
patent: 2002/0195632 (2002-12-01), Inoue et al.
patent: 2003/0134490 (2003-07-01), Inuzuka
patent: 2002-289817 (2002-10-01), None

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