Multi-speed serial interface for media access control and...

Electrical computers and digital processing systems: multicomput – Computer-to-computer protocol implementing

Reexamination Certificate

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Details

C709S223000, C370S466000, C370S469000, C370S470000, C370S476000

Reexamination Certificate

active

07418514

ABSTRACT:
A network device that operates in first and second serial gigabit interface modes involving data speed translation comprising a medium access control (MAC) device that transmits idle order sets. A physical layer (PHY) device receives the idle order sets and that switches from the first serial gigabit interface mode to the second serial gigabit interface mode if a first predetermined number of consecutive idle order sets are equal to a first idle order set.

REFERENCES:
patent: 6345310 (2002-02-01), Allison et al.
patent: 6516352 (2003-02-01), Booth et al.
patent: 2002/0194415 (2002-12-01), Lindsay et al.
patent: 2004/0114638 (2004-06-01), Matsuura et al.
patent: WO 01/41339 (2001-07-01), None
IEEE Standard 802.3, IEEE Standard for Information technology—Telecommunications and information exchange between systems—Local and metropolitan area networks—Specific requirements, Part 3: Carrier sense multiple access with collision detection (CSMA/CD) accss method and physical layer specifications, Mar. 8, 2002, pp. 1-173.

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