Pixel clock spread spectrum modulation

Computer graphics processing and selective visual display system – Display driving control circuitry

Reexamination Certificate

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Details

C345S030000, C345S099000, C345S213000

Reexamination Certificate

active

07443389

ABSTRACT:
Circuits, methods, and apparatus that reduce the peak or maximum EMI generated by video signals provided to a CRT or digital display monitor. One exemplary embodiment provides for spreading the spectrum of the video signal in order to spread or diffuse its peak spectral component. This may be done by spreading the spectrum of a pixel clock that is used to clock or time pixel information provided to the monitor. One embodiment spreads the spectrum of the pixel clock by varying the frequency of its operation. The pixel clock is generated by a phase-locked loop having a number of dividers. These dividers divide the frequency of one or more of the signals around the phase-locked loop. The divide ratio is varied as a function of time, resulting in a variation of an output signal frequency as a function of time.

REFERENCES:
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patent: 6046735 (2000-04-01), Bassetti et al.
patent: 6720943 (2004-04-01), Kim et al.
patent: 7050080 (2006-05-01), Ema et al.
patent: 7190360 (2007-03-01), Hiroki
patent: 7359007 (2008-04-01), Wu
patent: 2003/0020830 (2003-01-01), Sani et al.

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