Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor
Reexamination Certificate
2007-05-07
2008-08-12
Pham, Thanh V (Department: 2823)
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
C257S627000, C257S628000, C257SE33025, C257SE33034
Reexamination Certificate
active
07411273
ABSTRACT:
In an independent GaN film manufactured by creating a GaN layer on a base heterosubstrate using vapor-phase deposition and then removing the base substrate, owing to layer-base discrepancy in thermal expansion coefficient and lattice constant, bow will be a large ±40 μm to ±100 μm. Since with that bow device fabrication by photolithography is challenging, reducing the bow to +30 μm to −20 μm is the goal. The surface deflected concavely is ground to impart to it a damaged layer that has a stretching effect, making the surface become convex. The damaged layer on the surface having become convex is removed by etching, which curtails the bow. Alternatively, the convex surface on the side opposite the surface having become convex is ground to generate a damaged layer. With the concave surface having become convex due to the damaged layer, suitably etching off the damaged layer curtails the bow.
REFERENCES:
patent: 4756796 (1988-07-01), Saitou
patent: 2004/0221799 (2004-11-01), Nakayama et al.
patent: 2006/0113545 (2006-06-01), Weber et al.
patent: 2006/0220192 (2006-10-01), Kurachi et al.
patent: 1426497 (2003-06-01), None
Wolf et al. “Silicon Processing for the VLSI Ear”, vol. 1, chapter 1, p. 23-33 (1986).
Judge James W.
Pham Thanh V
Sumitomo Electric Industries Ltd.
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