Method for fabricating semiconductor package

Details Method for fabricating semiconductor package Method for fabricating semiconductor package

2006-11-06

2008-08-19

Thai, Luan (Department: 2891)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

C438S109000, C438S113000, C257S621000

Reexamination Certificate

active

07413925

ABSTRACT:
According to this invention, a method for fabricating a semiconductor package, in which a plurality of semiconductor chips having a through electrode is layered on a semiconductor interposer, comprising: mounting and layering a plurality of semiconductor chips on a first surface of a semiconductor wafer, which is to be used for a semiconductor interposer; forming a mold resin over the semiconductor chips to cover the semiconductor chips entirely; and dicing the semiconductor wafer to form a plurality of individual semiconductor packages.

REFERENCES:
patent: 6608371 (2003-08-01), Kurashima et al.
patent: 6614104 (2003-09-01), Farnworth et al.
patent: 6953748 (2005-10-01), Yamaguchi
patent: 7223634 (2007-05-01), Yamaguchi
patent: 2005/0046002 (2005-03-01), Lee et al.
patent: 2005-236245 (2005-09-01), None

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