Duty detection circuit and method for controlling the same

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Rectangular or pulse waveform width control

Reexamination Certificate

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Details

C327S172000

Reexamination Certificate

active

07417479

ABSTRACT:
A duty detection circuit is provided with a main circuit unit that includes at least a first capacitor that is discharged during the time period in which the clock signal is at a high level and charged during the time period in which the clock signal is at a low level, and a second capacitor that is charged during the time period in which the clock signal is at a high level and discharged during the time period in which the clock signal is at a low level, with the main circuit unit alternately charging or discharging the first and second capacitors in synchrony with the clock signal; and a duty correction signal generator for detecting the potential difference of the first and second capacitors and outputting a duty correction signal based on the potential difference.

REFERENCES:
patent: 6084452 (2000-07-01), Drost et al.
patent: 6373309 (2002-04-01), Bang
patent: 6583657 (2003-06-01), Eckhardt et al.
patent: 6967514 (2005-11-01), Kizer et al.
patent: 7119594 (2006-10-01), Kim
patent: 7199634 (2007-04-01), Cho et al.
patent: 2002/0017936 (2002-02-01), Stark et al.
patent: 2005/0104640 (2005-05-01), Park
patent: 2005/0122149 (2005-06-01), Cho et al.
patent: 2006/0170475 (2006-08-01), Monma et al.
patent: 61-071715 (1986-04-01), None
patent: 09-293374 (1997-11-01), None
patent: 11-127142 (1999-05-01), None
patent: 2001-144590 (2001-05-01), None
patent: 2001-326564 (2001-11-01), None
patent: 2002-025266 (2002-01-01), None
patent: 2002-135105 (2002-05-01), None
patent: 2003-110411 (2003-04-01), None
patent: 2003-318705 (2003-11-01), None
patent: 2004-088679 (2004-03-01), None
patent: 2004-206879 (2004-07-01), None
patent: 2005-0055925 (2005-06-01), None
Korean Office Action issued in Korean Patent Application No. KR 10-2006-0034337, mailed Oct. 23, 2007.
Japanese Office Action, with partial English translation, issued in Japansese Patent Application No. JP 2005-117750, mailed Nov. 13, 2007.
Ogawa, T., et al., “A 50% duty control circuit for PLL output”, The Institute of Electrical Engineers of Japan-Society for the Study of Electronic Circuits, Oct. 19, 2001, pp. 15-19.
Japanese Office Action, with Partial English Translation, issued in Japanese Patent Application No. 2005-027483, issued on Jan. 8, 2008.

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