PLL circuit

Details PLL circuit PLL circuit

2007-02-01

2008-08-26

Zweizig, Jeffrey S (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

Reexamination Certificate

active

07417477

ABSTRACT:
To a frequency divider having a reset function, a second clock of a frequency N×Y times higher than that of a first clock is inputted. Upon receipt of a signal indicating that the stop of the input clock is detected by a start/stop detection circuit, the frequency divider having a reset function resets the dividing of a frequency. Then, upon receipt of a signal indicating that the resumption of the input clock is detected by the start/stop detection circuit, the frequency divider generates and inputs a third clock to a phase comparator by starting the dividing of a frequency.

REFERENCES:
patent: 6173025 (2001-01-01), Jokura
patent: 6731146 (2004-05-01), Gallardo
patent: 7242230 (2007-07-01), Boyko et al.
patent: 7265635 (2007-09-01), Meltzer
patent: 10-308667 (1998-11-01), None

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