Testing combinational logic die with bidirectional...

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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C714S727000, C714S734000

Reexamination Certificate

active

07417450

ABSTRACT:
Testing of die on wafer is achieved by; (1) providing a tester with the capability of externally communicating JTAG test signals using simultaneously bidirectional transceiver circuitry, (2) providing die on wafer with the capability of externally communicating JTAG test signals using simultaneously bidirectional transceiver circuitry, and (3) providing a connectivity mechanism between the bidirectional transceiver circuitry's of the tester and a selected group or all of the die on wafer for communication of the JTAG signals.

REFERENCES:
patent: 6073254 (2000-06-01), Whetsel
patent: 6242269 (2001-06-01), Whetsel
patent: 6411116 (2002-06-01), DeHaven et al.
patent: 6543020 (2003-04-01), Rajski et al.
patent: 6747473 (2004-06-01), Cowan
patent: 2003/0009715 (2003-01-01), Ricchetti et al.
patent: 2006/0236174 (2006-10-01), Whetsel

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