Semiconductor device and an image processor

Details Semiconductor device and an image processor Semiconductor device and an image processor

2004-12-10

2008-08-12

Tran, Phuoc (Department: 2624)

Image analysis

Image compression or coding

Parallel coding architecture

C382S232000

Reexamination Certificate

active

07412101

ABSTRACT:
An apparatus for encoding a plurality of image data series and decoding a plurality of encoded image data series includes an interface control circuit for executing data read/write operation from and to a memory area, an encoding/decoding circuit for selectively executing encoding of image data of one series written into the memory area or decoding of encoded image data of one series, and a plurality of registers for giving an instruction of processing to the encoding/decoding circuit wherein the encoding/decoding circuit executes encoding and decoding on a time division basis and in a series unit for image data of a plurality of series in accordance with the instruction from the plurality of registers. The apparatus for executing encoding and decoding of multi-stream image data can be rendered compact in size.

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patent: 2001/0038649 (2001-11-01), Hagai et al.
patent: 2002/0041714 (2002-04-01), Ishida et al.
patent: 09-093577 (1995-09-01), None
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