Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2007-01-31

2008-08-12

Mai, Son L (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185140, C365S185180

Reexamination Certificate

active

07411838

ABSTRACT:
A drive circuit22controls voltages applied to a substrate1, selection gates SG0and SG1, a local bit line LB2, and a control gate CGn. By respectively applying a negative voltage to the control gate CGn, a positive voltage to the selection gate SG0, a voltage lower than the voltage applied to the selection gate SG0to the selection gate SG1, and a positive voltage to the local bit line LB2, the drive circuit22controls so that electrons are selectively drawn out of a floating gate FG3to the local bit line LB2by F-N tunneling during writing operation. Sufficient operation margin is obtained even when memory cells are miniaturized.

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