Multiple level cell memory device with single bit per cell,...

Details Multiple level cell memory device with single bit per cell,... Multiple level cell memory device with single bit per cell,...

2007-04-18

2008-10-14

Hoang, Huan (Department: 2827)

Static information storage and retrieval

Floating gate

Particular connection

C365S185170, C365S185110

Reexamination Certificate

active

07436705

ABSTRACT:
A non-volatile memory device has a plurality of memory cells that are organized into memory blocks. Each block can operate in either a multiple level cell mode or a single bit per cell mode. One dedicated memory block is capable of operating only in the single bit per cell mode. If the dedicated memory block is found to be defective, a defect-free block can be remapped to that dedicated memory block location to act only in the single bit per cell mode.

REFERENCES:
patent: 5877986 (1999-03-01), Harari
patent: 6414876 (2002-07-01), Harari
patent: 6462992 (2002-10-01), Harari
patent: 6519185 (2003-02-01), Harari
patent: 6523132 (2003-02-01), Harari
patent: 2005/0273549 (2005-12-01), Roohparvar

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