Semiconductor integrated circuit device equipped with substrate

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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3072962, 3072966, 3073031, 3073032, 307304, 36518909, 365226, H03K 301, H01L 2500, G11C 700

Patent

active

053291689

ABSTRACT:
A dynamic random access memory device negatively biases the semiconductor substrate, and a substrate bias system incorporated therein produces a negative bias voltage from an external power voltage level for accelerating the negative biassing operation before an internal power voltage is sufficiently developed by an internal step-down circuit incorporated therein; however, after the development, the substrate bias system produces the negative bias voltage from the internal power voltage so as to be less affectable by fluctuation of the external power voltage level.

REFERENCES:
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patent: 4710905 (1987-12-01), Uchida
patent: 4961167 (1990-10-01), Kumanoya et al.
patent: 4994689 (1991-02-01), Kikuda et al.
patent: 5109505 (1992-04-01), Kihara
patent: 5191235 (1993-03-01), Hara
patent: 5204840 (1993-04-01), Mazur

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