Test flip-flop with an auxillary latch enabling two (2) bits of

Details Test flip-flop with an auxillary latch enabling two (2) bits of Test flip-flop with an auxillary latch enabling two (2) bits of

1992-09-25

1994-07-12

Zazworsky, John

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307289, 307291, 377 73, 365154, 365201, 371 221, 371 223, 371 225, H03K 3037, H04B 1700, G01R 3100, G11C 2900

Patent

active

053291670

ABSTRACT:
A scan flip-flop cell including a flip-flop, a feed-back path by which the output of the flip-flop can be controllably held, and a latch in the feedback path that allows the cell to store two bits of data simultaneously.

REFERENCES:
patent: 4697279 (1987-09-01), Baratti et al.

Affiliated with

Also associated with

Rating

Test flip-flop with an auxillary latch enabling two (2) bits of does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Test flip-flop with an auxillary latch enabling two (2) bits of , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Test flip-flop with an auxillary latch enabling two (2) bits of will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-398844