Chip structure with redistribution traces

Details Chip structure with redistribution traces Chip structure with redistribution traces

2007-09-26

2008-09-16

Pert, Evan (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Ball or nail head type contact, lead, or bond

C257S786000, C257S784000, C257SE23020

Reexamination Certificate

active

07425767

ABSTRACT:
A semiconductor chip or wafer comprises a passivation layer and a circuit line. The passivation layer comprises an inorganic layer. The circuit line is over and in touch with the inorganic layer of the passivation layer, wherein the circuit line comprises a first contact point connected to only one second contact point exposed by an opening in the passivation layer, and the positions of the first contact point and the only one second contact point from a top view are different, and the first contact point is used to be wirebonded thereto.

REFERENCES:
patent: 4463059 (1984-07-01), Bhattacharya et al.
patent: 5646439 (1997-07-01), Kitayama et al.
patent: 6229221 (2001-05-01), Kloen et al.
patent: 6780748 (2004-08-01), Yamaguchi et al.
patent: 2003/0109079 (2003-06-01), Yamaguchi et al.
patent: 2003/0230803 (2003-12-01), Matsuo
patent: 2005/0121804 (2005-06-01), Kuo et al.
patent: 2007/0085938 (2007-04-01), Yamazaki et al.
patent: 2007/0170551 (2007-07-01), Lindgren

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