Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material
Reexamination Certificate
2005-04-21
2008-09-09
Soward, Ida M (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Insulating material
C257S678000, C257S690000, C257S711000, C257S725000, C257S758000, C257S773000, C257S774000, C257S787000
Reexamination Certificate
active
07423340
ABSTRACT:
A semiconductor package and a fabrication method thereof are provided in which a dielectric material layer formed with a plurality of openings is used and a solder material is applied into each of the openings. A first copper layer and a second copper layer are in turn deposited over the dielectric material layer and solder materials, and the first and second copper layers are patterned to form a plurality of conductive traces each of which has a terminal coated with a metal layer. A chip is mounted on the conductive traces and electrically connected to the terminals by bonding wires, with the dielectric material layer and solder materials being exposed to the outside. This package structure can flexibly arrange the conductive traces and effectively shorten the bonding wires, thereby improve trace routability and quality of electrical connection for the semiconductor package.
REFERENCES:
patent: 5154341 (1992-10-01), Melton et al.
patent: 5705851 (1998-01-01), Mostafazadeh et al.
patent: 5731709 (1998-03-01), Pastore et al.
patent: 5739581 (1998-04-01), Chillara et al.
patent: 5830800 (1998-11-01), Lin
patent: 5841191 (1998-11-01), Chia et al.
patent: 5859475 (1999-01-01), Freyman et al.
patent: 6057601 (2000-05-01), Lau et al.
patent: 6072239 (2000-06-01), Yoneda et al.
patent: 6093584 (2000-07-01), Fjelstad
patent: 6130115 (2000-10-01), Okumura et al.
patent: 6143981 (2000-11-01), Glenn
patent: 6229200 (2001-05-01), Mclellan et al.
patent: 6372540 (2002-04-01), Huemoeller
patent: 6462414 (2002-10-01), Anderson
patent: 6465882 (2002-10-01), Cohn et al.
patent: 6506633 (2003-01-01), Cheng et al.
patent: 6514847 (2003-02-01), Ohsawa et al.
patent: 6534391 (2003-03-01), Huemoeller et al.
patent: 6578754 (2003-06-01), Tung
patent: 6790760 (2004-09-01), Cohn et al.
patent: 6969914 (2005-11-01), Fuller et al.
patent: 7057294 (2006-06-01), Shibata
patent: 7259445 (2007-08-01), Lau et al.
patent: 2001/0039074 (2001-11-01), Bertin et al.
patent: 2003/0011063 (2003-01-01), Yamada
patent: 2003/0143777 (2003-07-01), Camenforte et al.
patent: 2003/0168725 (2003-09-01), Warner et al.
patent: 2005/0194665 (2005-09-01), Huang et al.
Huang Chien Ping
Huang Chih-Ming
Wang Yu-Po
Corless Peter F.
Edwards Angell Palmer & & Dodge LLP
Jensen Steven M.
Siliconware Precision Industries Co. Ltd.
Soward Ida M
LandOfFree
Semiconductor package free of substrate and fabrication... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor package free of substrate and fabrication..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor package free of substrate and fabrication... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3987027