Dynamic shift register with built-in disable circuit

Electrical pulse counters – pulse dividers – or shift registers: c – Shift register

Reexamination Certificate

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Details

C377S068000, C377S070000, C377S072000, C377S074000

Reexamination Certificate

active

07430268

ABSTRACT:
A disable circuit for using in a dynamic shift register unit comprising: a first input, a second input, an output, a first reference line for receiving a first supply voltage, a second reference line for receiving a second supply voltage, and six transistors. The disable circuit is capable of being coupled with a dynamic shift register unit having an input for receiving an input pulse and an output for outputting a shifted pulse. The disable circuit generates an output signal during an input pulse period or an output pulse period for the dynamic shift register unit, wherein the input pulse period and the output pulse period are responsive to a first input pulsed signal from the first input and a second input pulsed signal from the second input, respectively.

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