Method of fabricating self-aligned bipolar transistor

Details Method of fabricating self-aligned bipolar transistor Method of fabricating self-aligned bipolar transistor

2004-12-28

2008-09-09

Lee, Hsien-ming (Department: 2823)

Semiconductor device manufacturing: process

Forming bipolar transistor by formation or alteration of...

C438S310000, C438S313000, C438S318000, C438S320000

Reexamination Certificate

active

07422951

ABSTRACT:
The present invention provides a method of fabricating a self-aligned bipolar transistor, by which the fabricating method can be simplified by forming P+ and N+ junctions by self-alignment and by which device reliability can be enhanced. The present invention includes the steps of forming a well in a substrate isolated by a device isolation layer, forming a polysilicon gate on the substrate, forming an insulating layer on the substrate, forming a sidewall spacer on lateral sides of the polysilicon gate by etching the insulating layer, forming a P+ion implanted region in the substrate, forming an N+ion implanted region in the substrate, and forming silicide on the P+and N+ion implanted regions.

REFERENCES:
patent: 6235568 (2001-05-01), Murthy et al.
patent: 6372590 (2002-04-01), Nayak et al.
patent: 2004/0063263 (2004-04-01), Suzuki et al.

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