Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2006-12-14
2008-09-16
Thomas, Tom (Department: 2829)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S404000, C438S407000, C438S426000
Reexamination Certificate
active
07425495
ABSTRACT:
A method of manufacturing a semiconductor substrate and semiconductor device is disclosed and comprises forming a first monocrystalline semiconductor layer on a semiconductor base material, forming a second monocrystalline semiconductor layer covering the first monocrystalline semiconductor layer, and forming a support hole exposing the semiconductor base. A support layer is formed on the active surface of the semiconductor base material to fill the support hole and covers the second polycrystalline semiconductor layer. A cavity is formed between the second monocrystalline semiconductor layer and the semiconductor base material by selectively etching the first monocrystalline semiconductor layer through the opening surface. A buried insulating layer is formed in the cavity. A planarizing layer is formed on the semiconductor base material and planarized using the second polycrystalline semiconductor layer as an etch stop layer. The second polycrystalline semiconductor layer and the first polycrystalline semiconductor layer are removed.
REFERENCES:
patent: 2000-124092 (2000-04-01), None
patent: 2002-299591 (2002-10-01), None
patent: 2006-100681 (2006-04-01), None
patent: 2006-108206 (2006-04-01), None
patent: 2006-210683 (2006-08-01), None
T. Sakai et al., Separation by Bonding Si Islands (SBSI) for LSI Applications, Second International SiGe Technology and Device Meeting, Meeting Abstract, May 2004, pp. 230-231.
AdvantEdge Law Group, LLC
Brown Valerie
Seiko Epson Corporation
Thomas Tom
LandOfFree
Method of manufacturing semiconductor substrate and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of manufacturing semiconductor substrate and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of manufacturing semiconductor substrate and... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3970530