Efficient complex multiplication and fast fourier transform...

Details Efficient complex multiplication and fast fourier transform... Efficient complex multiplication and fast fourier transform...

2004-06-03

2008-09-09

Pan, Daniel (Department: 2183)

Electrical computers and digital processing systems: processing

Processing architecture

Long instruction word

C712S221000, C712S212000

Reexamination Certificate

active

07424594

ABSTRACT:
Efficient computation of complex multiplication results and very efficient fast Fourier transforms (FFTs) are provided. A parallel array VLIW digital signal processor is employed along with specialized complex multiplication instructions and communication operations between the processing elements which are overlapped with computation to provide very high performance operation. Successive iterations of a loop of tightly packed VLIWs are used allowing the complex multiplication pipeline hardware to be efficiently used. In addition, efficient techniques for supporting combined multiply accumulate operations are described.

REFERENCES:
patent: 4587626 (1986-05-01), Gray
patent: 5442579 (1995-08-01), Thomson
patent: 5625828 (1997-04-01), Carmon et al.
patent: 5819058 (1998-10-01), Miller et al.
patent: 5835392 (1998-11-01), Dulong et al.

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