Method of determining signal propagation delay through circuit e

Details Method of determining signal propagation delay through circuit e Method of determining signal propagation delay through circuit e

1995-07-05

1997-06-03

Heckler, Thomas M.

Boots, shoes, and leggings

G06F 1750

Patent

active

056361300

ABSTRACT:
A method is provided for accurately determining the propagation delay of a gate under consideration in a static timing analyzer. This is accomplished by determining both the output load and input rise time of the gate under consideration. These values are then compared with a load versus rise time grid having previously determined values of propagation delay (points) for specified combinations of load and input rise time. These points are then used to interpolate a value of propagation delay for the gate under consideration by an interpolation technique that accounts for at least one of the following non-linear effects: the feed forward capacitance of a gate, soft switching, gate resistance, source and drain resistance, and/or other non-linear effects. The method accounts for each non-linear effect by imparting a corresponding component to propagation delay only in that range of output load and input rise time for which that non-linear effect is most pronounced.

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Library Compiler Reference Manual, vol. 1, Version 3.0, Oct. 1992.

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