Pulse amplitude-modulated signal processing

Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder

Reexamination Certificate

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C341S144000

Reexamination Certificate

active

07345605

ABSTRACT:
According to some embodiments, a circuit includes a current mirror to receive a multi-level current signal, and to generate a plurality of current signals substantially identical to the multi-level current signal. Such a circuit may also include a plurality of current comparison circuits, each of the plurality of current comparison circuits to receive a respective one of the plurality of generated current signals, to receive a respective reference current signal, and to generate a signal indicating a relationship between the received respective one of the plurality of generated current signals and the respective reference current signal.

REFERENCES:
patent: 6473019 (2002-10-01), Ruha et al.
patent: 6947513 (2005-09-01), O'Toole et al.
Farjad-Rad, Ramin et al., “A 0.3-μm CMOS 8-Gb/s 4-PAM Serial Link Transceiver”, IEEE Journal of Solid-State Circuits, vol. 35, No. 5, May 2000, 0018-9200. p. 757-764.
Farjad-Rad, Ramin et al., “An Equalization Scheme for 10Gb/s 4-PAM Signaling over Long Cables”, Jul. 28, 1997. 17pgs.

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