Solid-state imager and camera system

Details Solid-state imager and camera system Solid-state imager and camera system

2008-05-20

2008-05-20

Vu, Ngoc-Yen (Department: 2622)

Television

Camera, system and detail

Solid-state image sensor

C348S241000, C348S243000

Reexamination Certificate

active

10503749

ABSTRACT:
When making a potential of a floating node 0V at the time of nonselection, electrons leak from the floating node to a photodiode and noise is generated. A MOS type solid-state imaging device comprised of unit pixels10, each having a photodiode11, a transfer transistor12for transferring a signal of this photodiode11to a floating node N11, an amplifier transistor13for outputting a signal of the floating node N11to a vertical signal line22, and a reset transistor14for resetting the floating node N11, arranged in a matrix, wherein, as a buffer final stage29for driving a drain line23, a buffer final stage having an inverter configuration formed by arranging a P-type MOS transistor on a ground side is used, thereby making the potential of the floating node N11for example 0.5V at the time of nonselection and preventing electrons from leaking to the photodiode11through the transfer transistor12.

REFERENCES:
patent: 6787751 (2004-09-01), Tanimoto
patent: 6965408 (2005-11-01), Hiyama et al.
patent: 2002/0032545 (2002-03-01), Mabuchi
patent: 0 908 957 (1999-04-01), None
patent: 11-112018 (1999-04-01), None
patent: 2002-051263 (2002-02-01), None
Wen Fang, Arthur Brunnschweiler, and Peter Ashburn; “An Accurate Analytical BiCMOS Delay Expression and its Application to Optimizing High-Speed BiCMOS Circuits;” Feb. 1992; IEE Journal of Solid-State Circuits; vol. 27, No. 2; pp. 191-202.

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