Method for forming via hole and trench for dual damascene...

Details Method for forming via hole and trench for dual damascene... Method for forming via hole and trench for dual damascene...

2008-03-18

2008-03-18

Chen, Kin-Chan (Department: 1792)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C438S700000, C438S723000

Reexamination Certificate

active

11024685

ABSTRACT:
A method for forming a via hole and a trench for a dual damascene interconnection comprises forming a via hole through an inter-metal insulating film to expose a portion of a surface of an etch stop film on a lower metal film, forming a photoresist film on an entire surface of the resultant structure and in the via hole, exposing a top surface and a side surface of the inter-metal insulating film by recessing the photoresist film using a development process for the photoresist film, forming a bottom antireflective coating film on the exposed surfaces of the inter-metal insulating film and the photoresist film, forming a mask pattern on the bottom antireflective coating film, forming a trench by an etching process using the mask pattern as an etch mask, and completely removing the photoresist film within the via hole.

REFERENCES:
patent: 5618751 (1997-04-01), Golden et al.
patent: 5976770 (1999-11-01), Sinta et al.
patent: 6706461 (2004-03-01), Sinta et al.
patent: 6960818 (2005-11-01), Rengarajan et al.
patent: 7109119 (2006-09-01), Bao et al.
patent: 2005/0191840 (2005-09-01), Ho et al.
patent: 10-2003-0055802 (2003-04-01), None

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