Parallel Processor efficiently executing variable...

Details Parallel Processor efficiently executing variable... Parallel Processor efficiently executing variable...

2008-07-15

2008-07-15

Dollinger, Tonia L. M. (Department: 2181)

Electrical computers and digital processing systems: processing

Processing architecture

Array processor

C712S024000, C712S208000, C712S215000, C712S224000, C712S226000, C717S136000

Reexamination Certificate

active

09654527

ABSTRACT:
A parallel processor performs efficient parallel processing of one or more basic instructions contained in each of a plurality of instruction words delimited by instruction delimiting information. The processor includes: a plurality of instruction execution units performing processes in accordance with corresponding, supplied basic instructions in parallel; an instruction fetch unit fetching the instruction words one by one in accordance with the instruction delimiting information; and an instruction issue unit recognizing and, in accordance therewith, selecting each of the basic instructions contained in each of the instruction words fetched by the instruction fetch unit to a corresponding instruction execution unit to execute the basic instruction.

REFERENCES:
patent: 5214763 (1993-05-01), Blaner et al.
patent: 5497496 (1996-03-01), Ando
patent: 5758114 (1998-05-01), Johnson et al.
patent: 5761470 (1998-06-01), Yoshida
patent: 5787302 (1998-07-01), Hampapuram et al.
patent: 5787303 (1998-07-01), Ishikawa
patent: 5881307 (1999-03-01), Park et al.
patent: 5930508 (1999-07-01), Faraboschi et al.
patent: 5941980 (1999-08-01), Shang et al.
patent: 6151668 (2000-11-01), Pechanek et al.
patent: 6467036 (2002-10-01), Pechanek et al.
patent: 6738892 (2004-05-01), Coon et al.
patent: 04-040525 (1992-02-01), None
patent: 05-197547 (1993-08-01), None
patent: 08-234978 (1996-09-01), None
patent: 8-234978 (1996-09-01), None
patent: 10-074145 (1998-03-01), None
patent: 10-232779 (1998-09-01), None
patent: 11-282674 (1999-10-01), None
Nair, Ravi, et al., “Exploiting Instruction Level Parallelism in Processors by Caching Scheduled Groups”, Computer Architecture News, US, Association for Computer Machinery, vol. 25, No. 2, May 1, 1997, pp. 13-25.

Affiliated with

Also associated with

Rating

Parallel Processor efficiently executing variable... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Parallel Processor efficiently executing variable..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Parallel Processor efficiently executing variable... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3954524