Decibel addition circuit

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Details

324142, 328145, 364857, G06F 7556, G06G 724

Patent

active

042901111

ABSTRACT:
An addition circuit for adding two decibel measurements received at input terminals 12 and 14, first substracts the inputs in a subtractor circuit 16 to obtain a difference d. Then, based upon the magnitude of the difference d, the addition circuit determines the value of 10 log [1+10.sup.d/10 ] or 20 log [1+10.sup.d/20 ] in a read-only memory circuit 20. A selector circuit 24 determines which of the two input decibel measurements is the larger and controls the complementer circuit 18 so that the value of the difference d is always negative. The output of the read-only memory circuit 20 is added to the larger of the two input in an adder 22.

REFERENCES:
patent: 3342984 (1967-09-01), Gray et al.
patent: 3657528 (1972-04-01), Plante
patent: 3792246 (1974-02-01), Gilbreath et al.
patent: 3940603 (1976-02-01), Smith
patent: 4000463 (1976-12-01), Katzmann et al.
patent: 4011509 (1977-03-01), Edwards

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