Exhaustive diagnosis of bridging defects in an integrated...

Details Exhaustive diagnosis of bridging defects in an integrated... Exhaustive diagnosis of bridging defects in an integrated...

2008-04-01

2008-04-01

Patel, Paresh (Department: 2829)

Electricity: measuring and testing

Measuring, testing, or sensing electricity, per se

With rotor

C716S030000

Reexamination Certificate

active

11423854

ABSTRACT:
A method, system and computer program product for diagnosing a bridging defect in an integrated circuit including multiple nodes are disclosed. Quiescent power supply current (IDDQ) of the integrated circuit (IC) is measured under multiple test vectors. Logic states of the nodes on the IC are also obtained under the multiple test vectors. The nodes are partitioned into sets based on their logic states under low-current test vectors. Large sets are further divided into subsets (“state-count subsets”) based on the logic states of nodes under high-current test vectors. For large sets, explicit evaluation under the IDDQbridge fault model is performed only on pairs of nodes belonging to subsets having complementary state counts, to save system resources in computation. Exhaustive diagnosis considering all pairs of nodes on the IC is thus feasibly achieved due to the saving of system resources.

REFERENCES:
patent: 5581563 (1996-12-01), Penza et al.
patent: 5963046 (1999-10-01), Konuk
patent: 6127838 (2000-10-01), Sachdev
patent: 6366108 (2002-04-01), O'Neill et al.
patent: 6449751 (2002-09-01), Hussain et al.
patent: 6677774 (2004-01-01), Buffet et al.
patent: 6694495 (2004-02-01), Hussain et al.
patent: 6812724 (2004-11-01), Rao et al.
patent: 6941235 (2005-09-01), Gattiker
patent: 6975978 (2005-12-01), Ishida et al.
patent: 7043389 (2006-05-01), Plusquellic
patent: 2005/0125711 (2005-06-01), Gattiker et al.
patent: 2006/0028199 (2006-02-01), Hatamian
“Efficient Diagnosis of Single/Double Bridging Faults with Delta Iddq Probabilistic Signatures and Viterbi Algorithm” by C. Thibeault, Dept. of Electrical Engineering, Canada. Year 2000.
“AL Logic Fault Diagnosis Tool and Its Applicans” by Venkataraman et al. Intel Corporation, CA USA. Year 2000.
Chakravarty et al., “IDDQMeasurement Based Diagnosis of Bridging Faults in Full Scan Circuits,” 7thInternational Conference on VLSI Design, Jan. 1994, pp. 179-182, doc. not submitted, not consider.

Affiliated with

Also associated with

Rating

Exhaustive diagnosis of bridging defects in an integrated... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Exhaustive diagnosis of bridging defects in an integrated..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Exhaustive diagnosis of bridging defects in an integrated... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3935962