Boots – shoes – and leggings
Patent
1994-03-09
1996-06-04
Coleman, Eric
Boots, shoes, and leggings
364229, 364230, 3642303, 3642283, 364DIG1, G06F 1576
Patent
active
055242642
ABSTRACT:
A parallel arithmetic-logical processing device in which arithmetic-logical processing is shared among and executed in a parallel fashion by a plurality of processing elements. The device includes a large-capacity serial access memory for continuous reading/writing of large-scale data, a small-capacity serial access memory for continuous reading/writing of small-scale data and a high-speed general-purpose random access memory for random writing/readout of small-scale data. A central processing unit (CPU) causes the memories to be used or not used depending on the scale of the arithmetic-logical processing. Since the serial access memory executes continuous data writing and reading, high-speed access may be achieved, so that it can be manufactured inexpensively with a large storage capacity. Consequently, the processing speed in the CPU may be increased, while the parallel arithmetic-logical processing device may be manufactured inexpensively.
REFERENCES:
patent: 4314349 (1982-02-01), Batcher
patent: 4521851 (1985-06-01), Trubisky
patent: 4594651 (1986-06-01), Jaswa
patent: 5155820 (1992-10-01), Gibson
patent: 5253308 (1993-10-01), Johnson
Kato Yasunobu
Oya Noboru
Shirota Norihisa
Coleman Eric
Sony Corporation
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