Boots – shoes – and leggings
Patent
1993-04-28
1996-06-04
Pan, Daniel H.
Boots, shoes, and leggings
364239, 3642397, 3642405, 364240, 3642407, 36424292, 364DIG1, 364DIG2, 395250, G06F 1316, G06F 1336, G06F 1340
Patent
active
055242596
ABSTRACT:
A processor system has a processor for outputting an instruction including a first data to be used for arithmetic process, a multiplier for executing arithmetic operation including a first memory for storing the instruction output from the processor, a second memory for storing second data selected based on the instruction, and an arithmetic circuit for executing arithmetic operation between the first data and the second data, an address bus for connecting the processor and the multiplier, a data bus for transferring the second data and arithmetic result obtained by the arithmetic circuit. The multiplier is capable of executing the arithmetic operation between the second data items or between the first data and the second data, the arithmetic result is output to the second memory or the data bus under the control of the instruction.
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patent: 4945506 (1990-07-01), Baji et al.
patent: 5068819 (1991-11-01), Misra et al.
patent: 5179530 (1993-01-01), Genusov et al.
patent: 5195050 (1993-03-01), Hsu et al.
Koga Miho
Miyamori Takashi
Kabushiki Kaisha Toshiba
Pan Daniel H.
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