System and method for generating a jittered test signal

Details System and method for generating a jittered test signal System and method for generating a jittered test signal

2008-01-01

2008-01-01

Fan, Chieh (Department: 2611)

Pulse or digital communications

Testing

Phase error or phase jitter

C375S225000, C375S227000, C375S228000, C375S280000

Reexamination Certificate

active

11114572

ABSTRACT:
A multi-speed jittered signal generator (216, 400) that generates a full-speed jittered signal (404) by scaling a low-speed jittered signal (420) using a frequency scaler (428). The low-speed jittered signal is created by injecting a modulation signal (416) into a reference signal (412) using a jitter injector (432). Injecting jitter into a low-speed reference signal allows the full-speed jittered signal to be of higher quality than conventional jitter signals created by injecting jitter information into a full-speed reference signal. The multi-speed jittered signal generator may be used as part of a testing system (208) for testing various circuitry, such as high-speed serializer/deserializer circuitry (220).

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