Instruction accelerator for processing loop instructions with ad

Details Instruction accelerator for processing loop instructions with ad Instruction accelerator for processing loop instructions with ad

1995-06-12

1996-06-04

Kim, Ken S.

39542107, 3954211, 395800, G06F 940

Patent

active

055242235

ABSTRACT:
An instruction accelerator which includes an instruction source, and a single instruction multiple data array processor which executes the instructions supplied by the instruction source. A loop processor identifies all loop type instructions which are supplied by the instruction source, copies those instructions supplied by the instruction source into a loop memory, and supplies those loop instructions to the single instruction multiple data array processor in the order received, at the rate required by the single instruction multiple data array processor, and as many times as required by the loop count field.

REFERENCES:
patent: 4566063 (1986-01-01), Zolnowsky et al.
patent: 4626988 (1986-12-01), George
patent: 4773038 (1988-09-01), Hillis et al.
patent: 4827403 (1989-05-01), Steele, Jr. et al.
patent: 4935867 (1990-01-01), Wang et al.
patent: 5083267 (1992-01-01), Rau et al.
patent: 5113370 (1992-05-01), Tomita
patent: 5121498 (1992-06-01), Gilbert et al.
patent: 5193202 (1993-03-01), Jackson et al.
patent: 5265253 (1993-11-01), Yamada
patent: 5303357 (1994-04-01), Inoue et al.
patent: 5367651 (1994-11-01), Smith et al.

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