Next instruction pointer calculation system for a microcomputer

Boots – shoes – and leggings

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

3642624, 3642628, 3642631, 364DIG1, G06F 922, G06F 930

Patent

active

055242219

ABSTRACT:
A microcomputer comprising an internal decoder for addressing instruction codes in an instruction prefetch buffer, a words field provided preferably in a micro ROM for storing number of words which indicate lengths of various instructions, and position calculating means provided in the bus interface unit for inputting the number of words to indicate an address of instruction code in the instruction prefetch buffer, so that the instruction code is read out concurrently with the execution of the micro instruction.

REFERENCES:
patent: 4742451 (1988-05-01), Bruckert et al.
patent: 4897787 (1990-01-01), Kawasaki et al.
patent: 4926323 (1990-05-01), Baror et al.
patent: 5129068 (1992-07-01), Watanaba et al.
patent: 5241637 (1993-08-01), Skruhak et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Next instruction pointer calculation system for a microcomputer does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Next instruction pointer calculation system for a microcomputer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Next instruction pointer calculation system for a microcomputer will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-392445

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.