Semiconductor device having multilayer printed wiring board

Details Semiconductor device having multilayer printed wiring board Semiconductor device having multilayer printed wiring board

Filed on

2008-07-15

Date issued

2008-07-15

Examiner

Williams, Alexander Oscar (Department: 2826)

Patent Class

Active solid-state devices (e.g., transistors, solid-state diode

SubClass

Housing or package

SubSubClass

With contact or lead

Other Related Categories

C257SE23004, C257SE23063, C257SE23101, C257SE23178, C257SE23069, C257SE25012, C257SE25031, C257S701000, C257S758000, C257S778000, C257S737000, C257S738000, C257S698000, C257S703000, C257S704000, C257S532000, C257S528000, C257S710000, C257S712000, C257S717000, C257S720000

Type

Reexamination Certificate

Status

active

Patent number

11023044

Description

ABSTRACT:
A semiconductor device includes a support body, a first substrate provided on a surface at one side of the support body, a second substrate provided on a surface at the other side of the support body, and a semiconductor chip provided on the first substrate exposed to an opening part piercing the support body and the second substrate. The first substrate includes a first dielectric layer and a wiring layer, a plurality of first electrodes connected to the semiconductor chip which first electrodes are provided on a first surface of the first substrate exposed to an inside of the opening part, and the second substrate includes a second dielectric layer made of a material substantially the same as the first dielectric layer.

REFERENCES:
patent: 5523622 (1996-06-01), Harada et al.
patent: 6324067 (2001-11-01), Nishiyama
patent: 6759740 (2004-07-01), Onitani et al.
patent: 6815810 (2004-11-01), Takehara et al.
patent: 6873529 (2005-03-01), Ikuta et al.
patent: 6951773 (2005-10-01), Ho et al.
patent: 2002/0127769 (2002-09-01), Ma et al.
patent: 2004/0041256 (2004-03-01), Takehara et al.
patent: 2004/0227258 (2004-11-01), Nakatani
patent: 2005/0001331 (2005-01-01), Kojima et al.
patent: 2005/0006745 (2005-01-01), Nishimura
patent: 2005/0051903 (2005-03-01), Ellsberry et al.
patent: 2005/0056942 (2005-03-01), Pogge et al.
patent: 2005/0117312 (2005-06-01), Kimura et al.
patent: 2005/0127489 (2005-06-01), Mallik et al.
patent: 2005/0146854 (2005-07-01), Ikuta et al.
patent: 2005/0151240 (2005-07-01), Takeda et al.
patent: 2005/0157477 (2005-07-01), Kuramochi et al.
patent: 2005/0161682 (2005-07-01), Mazzochette et al.
patent: 2005/0207133 (2005-09-01), Pavier et al.
patent: 2005/0211749 (2005-09-01), Hu et al.
patent: 2005/0230797 (2005-10-01), Ho et al.
patent: 2006/0049530 (2006-03-01), Hsu
patent: 5-226513 (1993-09-01), None
patent: 2000-133745 (2000-05-01), None
patent: 2002-83893 (2002-03-01), None
S. Towle, et al.; “Bumpless Build-Up Layer Packaging;” ASME International Mechanical Engineering Congress and Exposition (IMECE); Nov. 11, 2001; (19 Sheets.)/Discussed in the specification.
T. Shimoto, et al.; “High-Performance Flip-Chip BGA based on Multi-Layer Thin-Film Packaging Technology;” Proceedings of the 2002 IMAPS; Nov. 11, 2001; pp. 10-15 (6 Sheets.)/Discussed in the specification.

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