Patent
1982-05-05
1985-04-23
Larkins, William D.
357 41, 357 45, 357 237, H01L 2712, H01L 2710, H01L 2978
Patent
active
045133077
ABSTRACT:
A universal gate array is illustrated using a specific pattern of CMOS (Complementary Metal Oxide Silicon) Transistors in an array which provides a high degree of board utilization in the layout of small runs of integrated circuits where the high cost of completely customized boards is unacceptable. The array comprises a continuing pattern of two sets of three (3) series connected transistors in a cell surrounded on all four sides by cells each containing two single transistor gates of each channel type.
REFERENCES:
patent: 3999214 (1976-12-01), Cass
patent: 4278897 (1981-07-01), Ohno et al.
patent: 4295149 (1981-10-01), Balyoz et al.
patent: 4356504 (1982-10-01), Tozun
patent: 4412237 (1983-10-01), Matsumura et al.
Suskind et al., "The CMOS/SOS Automated Universal Array", Proceedings of the 1981 Custom Integrated Circuits Conference, pp. 69-72, (IEEE).
Hamann H. F.
Larkins William D.
Lutz Bruce C.
Montanye George A.
Rockwell International Corporation
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