Non-volatile memory device with single transistor memory cell

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S148000, C365S149000

Reexamination Certificate

active

11416085

ABSTRACT:
A non-volatile memory device includes a plurality of word lines, a plurality of sense lines, and a plurality of non-volatile memory cells. Each memory cell includes a floating gate transistor having a control gate, a floating gate separated dielectrically from the control gate, a drain connection and a source connection. The control gate is connected to one of the word lines and the source connection is connected to one of the sense lines, the drain connection being electrically isolated from the other memory cells. A method for reading the memory device and a method for operating the memory device are also provided.

REFERENCES:
patent: 6628152 (2003-09-01), Kern et al.
patent: 6842372 (2005-01-01), Hu
patent: 6979853 (2005-12-01), Sommer et al.
patent: 2002/0012271 (2002-01-01), Forbes
patent: 2002/0113262 (2002-08-01), Forbes
patent: 2002/0181283 (2002-12-01), Ghodsi
patent: 2005/0180211 (2005-08-01), Guterman et al.

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