Serial memories operated for re-ordering samples

Details Serial memories operated for re-ordering samples Serial memories operated for re-ordering samples

1990-10-22

1992-08-25

Heckler, Thomas M.

Boots, shoes, and leggings

364DIG2, 3649495, 3649504, 364942, 307590, C06F 738, H03K 500

Patent

active

051424886

ABSTRACT:
Serial memories are operated so as to reorder samples as they are serially supplied in a pipelined electronics system, such as one for performing matrix multiplications on a chain serial basis. A serial memory comprising (m-1) delay elements and a write multiplexer is operated so as to respond to data samples that occur every m.sup.th one of a series of consecutive sample intervals to generate successive groups of m successive samples, for example. As a further example, a serial memory comprising (mn-1) delay elements and a write multiplexer is operated so as to respond to every m.sup.th one of data samples supplied thereto, which said every m.sup.th data sample is in a first scanning order, to supply those every m.sup.th data samples in a second scanning order. The first scanning order may correspond to scanning in row major order a matrix of samples arranged in m rows and n columns, in which case the second scanning order corresponds to column major scanning order of that matrix of samples. Alternatively, the first scanning order may correspond to scanning in column major order a matrix of samples arranged in m rows and n columns, in which case the second scanning order corresponds to row major scanning order of that matrix of samples. Still more complex operations of serial memories for reordering samples as they are serially supplied for pipeline processing are described with reference to digital apparatus for performing matrix multiplication on a chain-serial basis.

REFERENCES:
patent: 4106103 (1978-08-01), Perreault
patent: 4593378 (1986-06-01), McWhirter et al.
patent: 4833635 (1989-05-01), McCanny et al.

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