Static information storage and retrieval – Floating gate – Particular connection
Reexamination Certificate
2008-07-15
2008-07-15
Auduong, Gene N. (Department: 2827)
Static information storage and retrieval
Floating gate
Particular connection
C365S185030, C365S185180
Reexamination Certificate
active
11355830
ABSTRACT:
A non-volatile memory device and programming process is described that compensates for coupling effects on threshold gate voltages of adjacent floating gate or non-conductive floating node memory cells by adjusting the threshold voltage level programmed in view of the data being programmed on a following programming cycle into adjacent memory cells, so that the coupling effect results in the desired target threshold voltages for the cells. In one embodiment of the present invention, memory cell coupling is compensated for by adjusting programming level of one or more memory cells of a first page a memory array to a higher or lower threshold verify target voltage given the data/programming level to be written to directly adjacent memory cells of a second page, so that coupling between the directly adjacent memory cells of the first and second pages brings the memory cells of first page to their final target programming level.
REFERENCES:
patent: 5528547 (1996-06-01), Aritome et al.
patent: 6975542 (2005-12-01), Roohparvar
patent: 6977842 (2005-12-01), Nazarian
patent: 6982905 (2006-01-01), Nguyen
patent: 7072219 (2006-07-01), Yeh
patent: 7206235 (2007-04-01), Lutze et al.
patent: 7254064 (2007-08-01), Kim et al.
patent: 2004/0109361 (2004-06-01), Eby et al.
Auduong Gene N.
Leffert Jay & Polglaze P.A.
Micro)n Technology, Inc.
LandOfFree
Programming method to reduce gate coupling interference for... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Programming method to reduce gate coupling interference for..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Programming method to reduce gate coupling interference for... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3903941