Input protective apparatus of semiconductor device

Details Input protective apparatus of semiconductor device Input protective apparatus of semiconductor device

1989-11-30

1991-05-28

Jackson, Jr., Jerome

357 41, 357 51, 357 59, H01L 2906, H01L 2702, H01L 2904

Patent

active

050198831

ABSTRACT:
An input protective apparatus for a semiconductor device (Q3) comprises an MOS transistor (Q4) having a thick gate insulating film formed therein. The MOS transistor (Q4) has one active layer connected to an input terminal (11) through a second resistor element (R2) and connected to a semiconductor device (Q3) to be protected through a first resistor element (R1), and an other active layer connected to a ground terminal. The input protective apparatus is adapted such that a resistance value R.sub.1 of a first resistor element (R1) and a resistance value R.sub.2 of the second resistor element (R2) satisfy the relation R.sub.1 >R.sub.2, and the on-resistance R.sub.3 of the MOS transistor (Q4) and the resistance value R.sub.2 satisfy the relation R.sub.3 <<R.sub.2.

REFERENCES:
patent: 4691217 (1987-09-01), Ueno et al.
patent: 4739438 (1988-04-01), Sato
Scott, David B., ESD Reliability, 1986 VLSI Symposium, Texas Instruments, May 28-30, 1986.
Electrical Overstress/Electrostatic Discharge Symposium Proceedings: "The Effects of VLSI Scaling on EOS/ESD Failure Threshold", by R. K. Pancholy, 1981, pp. 85-89.
"IBM Technical Disclosure Bulletin", vol. 29, No. 3 (Aug. 1986), pp. 1300 and 1301.
IBM Technical Disclosure Bulletin, vol. 26, No. 4, (Sep. 1983), Bellos et al, "Transistor for Circuit Protection Having Laterally Extended Collector Region Formign Series Resistor Isolating Circuit from High Voltage".

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