Non-volatile semiconductor memory device

Details Non-volatile semiconductor memory device Non-volatile semiconductor memory device

2007-10-23

2007-10-23

Auduong, Gene (Department: 2827)

Static information storage and retrieval

Floating gate

Particular connection

C365S185180, C365S185240

Reexamination Certificate

active

11402980

ABSTRACT:
According to one embodiment of this invention, a non-volatile semiconductor memory device of high speed program operation is realized. It provides a non-volatile semiconductor memory device comprising a cell array in which NAND strings having electrically re-programmable memory cells are connected in series are disposed in a matrix form; sense amplifiers for sensing threshold voltages of said memory cells by sensing potentials of bitlines connected to said memory cells and for having a first region having high voltage transistors and a second region having low voltage transistors; cell source lines connected to an end of said NAND strings; and a first cell source line driver being connected to said cell source lines and having a first transistor for supplying a grounding potential or a low potential to said cell source line, said first transistor of said cell source line driver being disposed in said first region of said sense amplifiers.

REFERENCES:
patent: 6363010 (2002-03-01), Tanaka et al.
patent: 6496418 (2002-12-01), Kawahara et al.
patent: 7117296 (2006-10-01), Hosono et al.
patent: 2005/0128843 (2005-06-01), Kajimoto et al.
patent: 2007/0058432 (2007-03-01), Hosono
patent: 2005-142493 (2005-06-01), None
Tomoharu Tanaka, et al., “A Quick Intelligent Page-Programming Architecture and a Shielded Bitline Sensing Method for 3 V-Only NAND Flash Memory”, IEEE Journal of Solid-State Circuits, vol. 29, No. 11, Nov. 1994, pp. 1366-1373.

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