Thin film array panel

Liquid crystal cells – elements and systems – Particular structure – Having significant detail of cell structure only

Reexamination Certificate

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Details

C349S042000, C349S043000

Reexamination Certificate

active

10843619

ABSTRACT:
A gate line is formed on a substrate, and a gate insulating layer is formed thereon. A data line is formed on the gate insulating layer, and a passivation layer is formed on the data line. The passivation layer has an opening exposing the gate insulating layer. A pixel electrode is formed on the passivation layer and it overlaps the data line and the passivation layer.

REFERENCES:
patent: 5003356 (1991-03-01), Wakai et al.
patent: 5576859 (1996-11-01), Castleberry
patent: 6300987 (2001-10-01), Jung
patent: 6445432 (2002-09-01), Yamamoto et al.
patent: 6466279 (2002-10-01), Nakata
patent: 2002/0075424 (2002-06-01), Sakamoto et al.
patent: 2002/0109811 (2002-08-01), Park et al.
patent: 2004/0001172 (2004-01-01), Tanaka et al.

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