Semiconductor wafer and a method for manufacturing a...

Details Semiconductor wafer and a method for manufacturing a... Semiconductor wafer and a method for manufacturing a...

2007-08-07

2007-08-07

Crane, Sara (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Physical configuration of semiconductor

C257S048000, C257S622000, C257S797000

Reexamination Certificate

active

11319545

ABSTRACT:
A semiconductor wafer includes (a) a first principal side and a second principal side opposite to each other, (b) a first bevel contour and a second bevel contour provided at an outer periphery of the first principal side and the second principal side, (c) a first recess formed in the first bevel contour, and (d) a first type of ID mark configured by a protruding dot provided on a bottom face of the first recess.

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Notification of Reasons for Refusal issued by the Japanese Patent Office on May 8, 2007, for Japanese Patent Application No. 2003-092737, and English-language translation thereof.

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