Differential input receiver having over-voltage protection

Amplifiers – With semiconductor amplifying device – Including differential amplifier

Reexamination Certificate

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C330S298000

Reexamination Certificate

active

11221643

ABSTRACT:
A differential receiver circuit. In one embodiment, the circuit includes first and second input transistors, each having a first terminal coupled to a bias node (a first and second bias node, respectively), as well as first and second bias transistors, each having a first terminal coupled to the first and second bias nodes, respectively. The circuit further includes a first current source coupled to provide current to the first bias node and a second current source coupled to the second bias node. The differential receiver circuit is coupled to first and second, which receive first and second voltages, respectively. The first and second current sources provide current to the first and second bias nodes, respectively, such that the voltage present on the first and second bias nodes remains with approximately a threshold voltage of a midpoint between the voltages present on the first and second voltage nodes.

REFERENCES:
patent: 4785258 (1988-11-01), Westwick
patent: 6828856 (2004-12-01), Sanchez et al.
patent: 6831513 (2004-12-01), Matsumoto et al.
patent: 6870424 (2005-03-01), Pradhan et al.
patent: 6933752 (2005-08-01), Dreps et al.
patent: 6970043 (2005-11-01), Pradhan et al.

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