Method of manufacturing hybrid integrated circuit device

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices

Reexamination Certificate

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Details

C438S115000, C257S618000, C257S620000, C257SE21596, C257SE21599

Reexamination Certificate

active

10905238

ABSTRACT:
A method of manufacturing a hybrid integrated circuit device includes the steps of forming a plurality of units each including a conductive pattern on a surface of a board made of metal, forming grooves along boundaries of the respective units of the board, electrically connecting circuit elements to the conductive patterns in the respective units, separating the respective circuit boards by dividing the board along the grooves, and flattening side surfaces of the circuit boards by pressing the side surfaces.

REFERENCES:
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patent: 6291880 (2001-09-01), Ogawa et al.
patent: 6482730 (2002-11-01), Masumoto et al.
patent: 6596561 (2003-07-01), Takahashi et al.
patent: 6841414 (2005-01-01), Hu et al.
patent: 6975022 (2005-12-01), Sakamoto et al.
patent: 6-177295 (1994-06-01), None
patent: A-00418776 (2001-01-01), None
Taiwanese Office Action dated Jul. 20, 2006.

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