Semiconductor device having a multilayer wiring structure

Details Semiconductor device having a multilayer wiring structure Semiconductor device having a multilayer wiring structure

2007-12-04

2007-12-04

Vu, Hung (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

C257S640000, C257S642000, C257S751000, C257S760000, C257S762000

Reexamination Certificate

active

11268905

ABSTRACT:
The present invention provides a semiconductor device having a multilayer wiring structure including a lower Cu buried-wiring layer, a SiC film, a SiOC film of 400 nm in thickness functioning as an interlayer insulating film, and an upper Cu buried-wiring layer electrically connected to the lower buried-wiring layer through contact plugs passing through the interlayer insulating film. The contact plugs and the upper Cu buried wiring layer are formed a single burying step of the dual damascene process. The SiOC film has a carbon content of about 12 atomic % and a relative dielectric constant of about 3.0. The upper Cu buried wiring layer is formed by burying a Cu film, through a barrier metal, in wiring grooves which are provided in the inter-wiring insulating film including a laminated film of an organic film, e.g., a PAE film of 200 nm in thickness, and a SiOC film of 150 nm in thickness.

REFERENCES:
patent: 6534870 (2003-03-01), Shimooka et al.
patent: 6949830 (2005-09-01), Owada et al.

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