Exposure system, semiconductor device, and method for...

Optics: measuring and testing – Inspection of flaws or impurities – Surface condition

Reexamination Certificate

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C356S237300, C356S237500, C355S077000, C430S022000, C430S030000

Reexamination Certificate

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11215246

ABSTRACT:
In order to link a defect inspection process before forming contact holes with an exposure process for forming the contact holes, a position (physical coordinates) of a defect on a wafer is stored, the defect having been detected in the defect inspection process before forming the contact holes, an exposure (dummy exposure) is performed under the condition that no contact hole is formed on the above-mentioned position. In this method, no contact hole is formed in the region having the defect therein, the cell is considered as a defective one, yet a word line (control gate) and a bit line are not short-circuited through the contact hole, and makes it possible to avoid the short-circuiting by only applying a redundancy to the bit line as conventionally employed.

REFERENCES:
patent: 6559662 (2003-05-01), Yamada et al.
patent: 6800421 (2004-10-01), Hasegawa et al.
patent: 7116816 (2006-10-01), Tanaka et al.
patent: 3-89511 (1991-04-01), None
patent: 2-178968 (1997-07-01), None
patent: 11-297595 (1999-10-01), None
patent: 2000-292810 (2000-10-01), None
patent: 2002-124447 (2002-04-01), None
patent: 2000-184669 (2002-06-01), None

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